Parallel Adaptive Arbiter for Improved CPU Utilization and Fair Bandwidth Allocation

Nowadays, task parallelism is recognized to be a huge challenge for future extreme scale computing system. Advancement in parallel computing system necessitates solving the bus contention in a most efficient manner along with high computation rate. An arbiter receives bus requests from master components to grant the bus access. Therefore, an arbiter plays an important role in solving the bus contention in any System-on-Chip (SoC). This article presents a new technique for arbitration called Parallel Adaptive Arbitration (PAA) to maximize the usage of CPU cores along with fair and moderate bus bandwidth allocation. This arbitration algorithm is developed for heterogeneous masters designed according to the different traffic behavior to enable high degree of task parallelization. The results reveal that PAA is more advantageous than the other conventional arbitration algorithms for several reasons including utilization of CPU cores up to its maximum extent using synchronization of heterogeneous masters. The proposed arbitration technique could be a promising approach for designing SoC for future applications.